Modern integrated circuits are extremely complex devices that are fabricated using equally complex processes. As the term is used herein, “integrated circuit” includes devices such as those formed on monolithic semiconducting substrates, such as those formed of group IV materials like silicon or germanium, or group III–V compounds like gallium arsenide, or mixtures of such materials. The term includes all types of devices formed, such as memory and logic, and all designs of such devices, such as MOS and bipolar. The term also comprehends applications such as flat panel displays, solar cells, and charge coupled devices. Because of the complexity of integrated circuits and the processes by which they are formed, it can be extremely difficult to determine the reasons why some devices function properly and other devices function improperly, or fail altogether.
Integrated circuits are typically manufactured on thin silicon substrates, commonly referred to as wafers. The wafer is divided up onto smaller rectangular sections for each device, typically known as the die or device. The methods and other embodiments according to the present invention can be applied to processes that are performed on other substrates to make other devices or components, such as flat panel display manufacturing, which is performed on rectangular glass substrates. Thus, this disclosure generally refers to substrates, substrate profiles, and substrate contact points, even though silicon wafer processing may be the most common application for the embodiments of the invention. It is appreciated that the same or similar methods are just as applicable to the analysis of a wide variety of substrates. Wafer test yield of die, or simply yield, is predominantly used as an example herein of an important dependent variable of interest. However, it is appreciated that any other dependent variable that is spatially associated with the substrate can also be used.
One method to assist in failure analysis is mapping important variables, such as yield, according to the position at which the variable is read on the substrate. Wafer mapping, for example, has traditionally been done by plotting the pass/fail data (i.e. yield) or other variable of interest versus the die position on the wafer. These wafer maps can be enhanced by combining values from many wafers in what is known as a stacked map. Recently there have been improvements in substrate mapping that can combine data from many wafers and many devices into what is known as a high-resolution wafer profile. Such substrate profiles are created from databases of information that is associated with substrates. A graphical representation is developed from the information, which representation depicts the yield or other variable read from the devices on the substrate, according to their position on the substrate. Substrate profiles such as these look somewhat like a topographical map, where the various contours of the profile delineate areas of different average (or otherwise computed) yield or other measured variable of interest for the devices bounded by those contours on the substrates. The methods described herein can be used with standard wafer maps or stacked wafer maps. However, use with substrate profiles is preferred.
The existing method of overcoming this problem is for the engineers to review the substrate profile map and see if they recognize within it a pattern they have seen elsewhere. If they do not recognize the pattern, then they may pass around a picture of the substrate profile to other engineers, and hope that someone recognizes a possible cause. In any case, connecting a substrate pattern with a physical cause depends on whether such a problem has been seen and resolved before, and someone remembers the incident and can connect the pattern in the substrate profile with the previous problem.
The problem with the current approach is that there is a low likelihood of making the connection between a pattern in the substrate profile and the possible causes that may be due to physical contact or near contact of the substrate with processing equipment. This can be due to a variety of reasons, such as the person reviewing the substrate profile not being aware of a previous issue, or not being aware of how process equipment contacts the substrate.
What is needed, therefore, is a system for constructing, using, and interpreting substrate profiles and other maps that reduces some of the problems mentioned above.